SNUG Proceedings

Sort and filter by Location, Year, or Content Type to locate the papers, presentations, and session recordings that are applicable to you. You can also search all SNUG event proceedings using the keyword search below.

2019 - Europe

Fight Pessimism with Statistics - What is LVF and how to cook it!

Olga Gudkova - Synopsys

Track - Custom Implementation & AMS

2019 - Europe

Fight Pessimism with Statistics - You cooked it, now eat it!

Gernot Gall - Synopsys

Track - Custom Implementation & AMS

2019 - Europe

Getting your $$$ from Verilog-A

Peter Grove - Dialog Semiconductor

Track - Custom Implementation & AMS

2019 - Europe

Layout Post Processing with Synopsys PyCell Studio

Ilya Temnikov - LFoundry

Track - Custom Implementation & AMS

2019 - Europe

Making Sure Your Design is Robust Enough Against Variations - Efficient Monte Carlo Solution with HSPICE, FineSim and CustomSim

Uwe Trautner - Synopsys

Track - Custom Implementation & AMS

2019 - Europe

NVM Embedded Memories Design Enablement Flow with Synopsys Platform (Technical Committee Award, Honorable Mention)

Laura Capecchi, Dario Livornesi, Chantal Auricchio, Stefano Zanchi, Marcella Carissimi, Fabio De Santis, Luca Togni, Paolo Valente, Valentina Cuomo - STMicroelectronics

Track - Custom Implementation & AMS

2019 - Europe

Utilizing System Verilog in Conjunction with Verilog-A for Mixed Signal Verification with Behavioral Models - an Alternative to Verilog AMS!

Peter Thompson - Synopsys

Track - Custom Implementation & AMS

2019 - Europe

VCS-AMS© UPF Mixed Signal Flow for STMicroelectronics Bluetooth Low Energy Design Verifications (1st Place Best Presentation)

Cécile Specq, François Ravatin - STMicroelectronics

Track - Custom Implementation & AMS

2019 - Europe

Formality 2018.06 and 2019.03 Technology Update

Rod Carroll - Synopsys

Track - Frontend Implementation

2019 - Europe

PrimeTime 2019.03 Release Overview and Accelerated Design Closure with PTECO

Simon Bloyce - Synopsys

Track - Frontend Implementation