SNUG Proceedings

Sort and filter by Location, Year, or Content Type to locate the papers, presentations, and session recordings that are applicable to you. You can also search all SNUG event proceedings using the keyword search below.

2017 - Austin

SoC Verification Challenges Eased with Reusable Test Suites and Customizable Performance Analyzers (1st Place Best Presentation)

Aravind Prakash, Hema Thyagarajan, David Shan – NXP Semiconductors

Track - Verification Continuum I

2017 - Austin

SpyGlass Reset Domain Crossing Analysis

Russ Roan – Synopsys

Track - Verification Continuum I

2017 - Austin

Verification Prowess with the UVM Harness (Technical Committee Best Paper)

Jeff Vance, Jeff Montesano, Kevin Johnston– Verilab

Track - Verification Continuum I

2017 - Austin

A “Completely Cool” Case Study – Synopsys Low Power Verification

Tushar Parikh – Synopsys

Track - Verification Continuum II

2017 - Austin

FCA (Formal Coverage Analyzer): Using Formal Unreachability Analysis to Accelerate Toggle Coverage Closure

Jimmy Thayil, Jing Huang, Amol Bhinge – NXP Semiconductors; Tareq Altakrouri – Synopsys

Track - Verification Continuum II

2017 - Austin

Gate Verification: Gateway to Better Results!

Vaibhav Kumar, Amol Bhinge – NXP Semiconductors

Track - Verification Continuum II

2017 - Austin

Increase Your Verification Productivity With VC Formal

Tareq Altakrouri – Synopsys

Track - Verification Continuum II

2017 - Austin

SoC Connectivity Checking with VC Formal Using a Domain Specific Language

Lars Viklund, Kenny Ranerup – Axis Communications

Track - Verification Continuum II

2017 - Austin

Advanced Debug Techniques for HAPS Prototyping

Bob Efram – Synopsys

Track - Verification Continuum III (FPGA & Prototyping)

2017 - Austin

Enabling High Reliability and Functional Safety for FPGA Based Hardware Design

Carl Cleaver – Synopsys

Track - Verification Continuum III (FPGA & Prototyping)