SNUG Proceedings

Sort and filter by Location, Year, or Content Type to locate the papers, presentations, and session recordings that are applicable to you. You can also search all SNUG event proceedings using the keyword search below.

2019 - Austin

Working Hard and Smart - Physical Verification Productivity Solutions using IC Validator

Jonathan White - Synopsys

Track - Physical Implementation

2019 - Austin

DFT Shifts Left to Accelerate Time to Results

Giri Podichetty - Synopsys

Track - Test

2019 - Austin

Effectiveness of Testpoints with SpyGlass DFT ADV on the Qualcomm Hexagon DSP (3rd Place Best Presentation)

Preston McWithey, Paul Policke, Shwetha Shivashankar Murthy - Qualcomm

Track - Test

2019 - Austin

Test Case to Share RAM Sequential ATPG Improvement Efforts and Results with Synopsys TetraMAX II

Maheshkumar Devani - MediaTek

Track - Test

2019 - Austin

Boosting Regression Performance – Advanced Simulation Acceleration

Hillel Miller - Synopsys

Track - Verification Continuum HW

2019 - Austin

Functional Coverage on Emulation

Track - Verification Continuum HW

2019 - Austin

HAPS - ZeBu Companion Flow for IP Design

Track - Verification Continuum HW

2019 - Austin

Hybrid Emulation – The New Frontier Shifting Left High-level OS/SW Development

Mojin Kottarathil, Jon McCallum - Synopsys

Track - Verification Continuum HW

2019 - Austin

U-boot and Linux Bring-up of Automotive SoC on ZeBu

Dhruvesh Shah, Bharadwaj Ramanujam, Lan V Nguyen - NXP Semiconductors

Track - Verification Continuum HW

2019 - Austin

ZeBu Emulation for Automotive SoC: Transactor Integration and Performance

Siddharth Satyapriya , Dhruvesh Shah - NXP Semiconductors; Dinh Bui - Synopsys

Track - Verification Continuum HW