SNUG Proceedings

Sort and filter by Location, Year, or Content Type to locate the papers, presentations, and session recordings that are applicable to you. You can also search all SNUG event proceedings using the keyword search below.

2018 - Austin

Best Practices and Synopsys QuickStart Implementation Kits (QIKs) for the Latest Armv8-A Processors

Lisa Minwell - Arm; Michael Montana - Synopsys

Track - Physical Implementation

2018 - Austin

Block Level Floorplan Debug With IC Compiler II

Pete Churchill - Synopsys

Track - Physical Implementation

2018 - Austin

Fast, High-Quality Interconnect Pre-Routing with IC Compiler II

Dan Guilin - Synopsys

Track - Physical Implementation

2018 - Austin

PG Network Creation and Analysis for Advanced Node Designs

Xiang Qiu - Synopsys

Track - Physical Implementation

2018 - Austin

What's New with IC Compiler II

James Harper - Synopsys

Track - Physical Implementation

2018 - Austin

Design Graph-based Generated Clock Definition Check with PrimeTime Constraint Consistency

Bin Tang, David Newmark, Raghu Pattipati - Advanced Micro Devices

Track - Publish Only

2018 - Austin

Disk Space Management Techniques for Silicon Engineers

Jigar Savla - Juniper Networks

Track - Publish Only

2018 - Austin

ESP Verification Methodology For a Multi Voltage Supply, Multi-Clock Domain Custom Memory Macro

Amlan Ghosh, Alexey Volossiky - Advanced Micro Devices; Hari Sathianathan - Synopsys

Track - Publish Only

2018 - Austin

eXecutable Verification Plan (XVP) for Configurable IP

Pinal Patel, Gaurav Brahmbhatt, Suketu Saheba, Deep Patel - eInfochips; Joe McCann - Synopsys

Track - Publish Only

2018 - Austin

Formal Verification Approach for Registers using VC Formal

Varun Ramesh, Amol Bhinge - NXP; Tareq Altakrouri - Synopsys

Track - Publish Only