SNUG Proceedings

Sort and filter by Location, Year, or Content Type to locate the papers, presentations, and session recordings that are applicable to you. You can also search all SNUG event proceedings using the keyword search below.

2019 - Austin

SMVA-based Efficient Approach to Analyze Impact of Supply Variations on Timing Closure in a Multi-voltage Design

Kishan Ganapathi, Gurdarshan Singh Kalra - Xilinx

Track - Frontend Implementation

2019 - Austin

Timing Issues : CONMAN to the Rescue

Track - Frontend Implementation

2019 - Austin

Realizing Best-in-Class QoR and the Fastest Time-to-Market with the Synopsys Fusion Design Platform

James Harper - Synopsys

Track - Frontend/Physical Implementation

2019 - Austin

Solving Design Problems and Maximizing Productivity with the Fusion Compiler GUI

John Griner - Synopsys

Track - Frontend/Physical Implementation

2019 - Austin

16nm Data centre Complex ASIC [300+Mn instance] - Deep dive into Convergence(FP, Timing) and reducing sign off TTR using ICC2

Arif Khan, Prathmesh Oza - Einfochips

Track - Physical Implementation

2019 - Austin

A Text Editor Plugin to Enhance Tcl Scripting Workflow During Synthesis, Place and Route and Timing Closure

Ramasamy Adaikkalavan - AMD

Track - Physical Implementation

2019 - Austin

Block Level CTS Debug With IC Compiler II

Pete Churchill - Synopsys

Track - Physical Implementation

2019 - Austin

Clocking Challenges is Advanced ADAS SoCs

Anis Jarrar, Mark Boyer, Rajeev Srivastava - NXP Semiconductors ; Frank Gover - Synopsys

Track - Physical Implementation

2019 - Austin

Detailed Bus Planning Using IC Compiler II Create Route Tool

Pamela Smoot, Shuhua Li - Advanced Micro Devices

Track - Physical Implementation

2019 - Austin

Planning for Success; DP Solutions for Large and Complex Designs

Jim Schultz - Synopsys

Track - Physical Implementation