Sort and filter by Location, Year, or Content Type to locate the papers, presentations, and session recordings that are applicable to you. You can also search all SNUG event proceedings using the keyword search below.
2019 - Austin
Physical Verification on the Cloud - Solving Physical Signoff TAT Challenges
Track - Cloud
2019 - Austin
Analog Design Closure with Custom Compiler
Track - Custom Implementation and AMS
2019 - Austin
Chip-Level IDDQ Current Simulation and Leaky Path Detection using CustomSim
Track - Custom Implementation and AMS
2019 - Austin
Chip-Level Verification of an RF ASIC with CustomSim/VCS
Track - Custom Implementation and AMS
2019 - Austin
Bottom-Up Timing Constraints Integration
Track - Frontend Implementation
2019 - Austin
Formality Interactive and Automatic ECO Solutions
Track - Frontend Implementation
2019 - Austin
Graphic Core IP Power Optimization Using minPower Guided and SAIF Driven Synthesis
Track - Frontend Implementation
2019 - Austin
Latest Advances in PrimeTime-ADVPlus to Address Design Closure at 5nm and Below
Track - Frontend Implementation